Source: https://guthlabs.ai/docs/instruments/logic-gate-circuit-simulator-basic/mechanism/

instrument mechanism / verified-clean

# Logic Gate Circuit Simulator (Basic) mechanism

The inspectable method record for Logic Gate Circuit Simulator (Basic), kept separate from implementation and qualification.

Status: **VERIFIED_CLEAN**Lifecycle: **verified-clean**

## Model scope

The Boolean gate formulas and DAG evaluation method are standard and correct. Verdict is NEEDS_REVIEW because gate arity, malformed-network handling, and deterministic trace ordering are not explicitly specified, not because the stated logic formulas are incorrect.

No additional formula finding is recorded.

## Units and conventions

- Inputs and outputs are Boolean values: 0=false and 1=true; there are no physical units.

- AND, OR, NAND, and NOR are assumed to be 2-input gates in these vectors.

- XOR is assumed to be a 2-input exclusive OR: 1 exactly when its two inputs differ.

- NOT is assumed to be a single-input inverter.

- Evaluation is purely combinational: the gate network must be a directed acyclic graph, and propagation is performed in topological order.

## Inspectable vector

One of 4 source-bound review vectors:

````
{
  "inputs": {
    "network": {
      "g1": {
        "type": "AND",
        "inputs": [
          "A",
          "B"
        ]
      },
      "g2": {
        "type": "OR",
        "inputs": [
          "B",
          "C"
        ]
      },
      "g3": {
        "type": "NOT",
        "inputs": [
          "C"
        ]
      },
      "g4": {
        "type": "XOR",
        "inputs": [
          "g1",
          "g2"
        ]
      },
      "g5": {
        "type": "NAND",
        "inputs": [
          "g4",
          "g3"
        ]
      },
      "g6": {
        "type": "NOR",
        "inputs": [
          "g1",
          "g3"
        ]
      },
      "outputs": [
        "g5",
        "g6"
      ]
    },
    "states": {
      "A": 0,
      "B": 0,
      "C": 0
    }
  },
  "expected_outputs": {
    "trace": {
      "g1": 0,
      "g2": 0,
      "g3": 1,
      "g4": 0,
      "g5": 1,
      "g6": 0
    },
    "outputs": {
      "g5": 1,
      "g6": 0
    }
  },
  "working": "g1 = A AND B = 0 AND 0 = 0. g2 = B OR C = 0 OR 0 = 0. g3 = NOT C = NOT 0 = 1. g4 = g1 XOR g2 = 0 XOR 0 = 0. g5 = NAND(g4,g3) = NOT(0 AND 1) = NOT 0 = 1. g6 = NOR(g1,g3) = NOT(0 OR 1) = NOT 1 = 0. Therefore outputs are g5=1 and g6=0. This is the all-zero input edge case."
}
````

## Failure boundary

**BREAK_CLAIMED** · SELF_FLAGGED

The specification does not define validation for non-Boolean input states or the polarity convention for 0 and 1. An input such as 2 must be rejected rather than evaluated, and active-high versus active-low interpretation can change displayed output labels.

## Other records

[01**Overview**](<https://guthlabs.ai/docs/instruments/logic-gate-circuit-simulator-basic/>)[03**Implementation**](<https://guthlabs.ai/docs/instruments/logic-gate-circuit-simulator-basic/implementation/>)[04**Qualification**](<https://guthlabs.ai/docs/instruments/logic-gate-circuit-simulator-basic/qualification/>)

## Sources and evidence

These pointers bind the page to evidence. They do not grant authority or collapse verification into deployment.

- `VERIFIED_LEDGER.json`

- `evidence-tranche6/tranche6-results.json`

- `BOUNDARY_HAZARD_CATALOG.json`