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instrument mechanism / verified-clean
CPU Clock Cycle / IPC Performance Calculator mechanism
The inspectable method record for CPU Clock Cycle / IPC Performance Calculator, kept separate from implementation and qualification.
Model scope
Core formulas are standard, but the specification needs an explicit CPI-versus-IPC input contract, explicit Hz/MHz/GHz unit handling, and an explicit MIPS conversion before it can be verified as unambiguous.
- time=instructions×CPI/clock_rate is the standard execution-time formula when clock_rate is in cycles per second and CPI is cycles per instruction.
- IPS=clock_rate/CPI is the standard throughput formula for average CPI.
- The input specification permits IPC, but no conversion rule is stated. If IPC is supplied, the standard reciprocal relation CPI=1/IPC must be applied under steady-state assumptions; IPC must not be substituted directly into the CPI formulas.
- MIPS is listed as an output, but no explicit conversion formula is given. It should be MIPS=IPS/1000000 when IPS is in decimal instructions per second.
Units and conventions
- clock_rate is measured in hertz, meaning cycles per second; GHz and MHz must be converted to Hz before calculation.
- instruction_count is a nonnegative count of instructions.
- CPI is measured in cycles per instruction and must be positive.
- IPC is measured in instructions per cycle and, when accepted, is converted using CPI=1/IPC with IPC>0.
- execution time is reported in seconds.
- IPS is reported in decimal instructions per second; MIPS means decimal millions of instructions per second, using 1 MIPS=1000000 instructions per second.
Inspectable vector
One of 4 source-bound review vectors:
{
"inputs": {
"clock_rate_hz": 2500000000,
"instruction_count": 4000000000,
"CPI": 1.25
},
"expected_outputs": {
"execution_time_seconds": 2,
"IPS": 2000000000,
"MIPS": 2000
},
"working": "cycles = 4000000000 instructions × 1.25 cycles/instruction = 5000000000 cycles; execution time = 5000000000 cycles ÷ 2500000000 cycles/second = 2 seconds; IPS = 2500000000 cycles/second ÷ 1.25 cycles/instruction = 2000000000 instructions/second; MIPS = 2000000000 ÷ 1000000 = 2000 MIPS."
}Failure boundary
BREAK_CLAIMED · SELF_FLAGGED
CPI=0 produces an undefined IPS result and should be rejected; the input-schema CPI-versus-IPC switch and clock-rate unit convention can also produce drastically different outputs if interpreted incorrectly.
Other records
Sources and evidence
These pointers bind the page to evidence. They do not grant authority or collapse verification into deployment.
VERIFIED_LEDGER.jsonevidence-tranche4/tranche4-results.jsonBOUNDARY_HAZARD_CATALOG.json